In the fabrication process for integrated circuit (IC) devices, methods of microscopic examination are frequently used for quality control purpose and for examination of defects. For instance, either an optical microscope at high magnification or a transmission electron microscope can be used to examine features in an IC device for process verification and quality assurance. The microscopes can be used to examine passivation layers and via formation between metal conductor layers, and defects in polygate formation.
To prepare samples of IC devices for microscopic examination, an extremely smooth surface on the sample must first be prepared. Conventionally, a lapping or polishing apparatus is utilized for preparing such samples for microscopic examination. In a lapping tool, a lapping or polishing wheel having an abrasive surface such as a diamond abrasive paper is used to remove surface layers on an IC device. In order to insure an accurate and even removal of the surface layers, the IC device must be securely held in a sample holder. Conventionally, numerous commercially available sample holders are used for such purpose.
One of such commercially available sample holder is shown in FIG. 1A. In the parallel lapper 10, a micronmeter 12 is used to advance a die such that surface layers of minute thickness on the die 20 can be removed. The die 20 is shown in FIG. 1B. A die holder 16, which is a liquid filled diaphragm is used to hold the die 20 for attaching to a disc (not shown) in the lapping tool 10. The parallel lapper 10 can be held by hand and pressed upon a grinding wheel, or a polishing disc 22. A typical polishing or lapping disc used is a diamond abrasive paper. In the lapping tool 10 shown in FIGS. 1A and 1B, while the thickness of the surface layer of the die 20 removed can be controlled by the micronmeter 12, the planarity of the new surface on the die 20 cannot be accurately controlled. In other words, a larger thickness may be removed from one edge of the die than the other edge of the die. This causes great processing difficulties in preserving a specific feature or a defect in the die surface that is to be examined.
An improved parallel lapper 30 is shown in FIG. 2. In parallel lapper 30, three equally spaced micronmeters 32 are mounted in a sample holder disc 26 while an IC die is held by a sample mount 28. The parallel lapper 30 provides the benefit of improved control of the planarity of the sample surface to be polished. By suitably adjusting the three micronmeters 32, an accurate thickness of the sample surface can be removed. However, each time an additional layer on the die surface is to be removed, all three micronmeters 32 must be simultaneously adjusted. The adjustment presents a laborious task in using the parallel lapper 30 for preparing a sample surface on an IC die. Moreover, in order to determine whether a desirable surface has been obtained, i.e., the surface which contains the defect to be examined, the IC die held on the sample mount 28 must be examined in an inverted microscope to make such determination. The condition of the IC die cannot be observed from the top of the parallel lapper 30.
It is therefore an object of the present invention to provide a sample holder for a miniature device for use in a parallel lapping tool that does not have the drawbacks and shortcomings of the conventional sample holders.
It is another object of the present invention to provide a sample holder for an electronic device for use in a parallel lapping tool that is equipped with a hollow-centered sample holder assembly such that the condition of the sample surface and the lapping process can be readily monitored from the top of the sample holder assembly.
It is a further object of the present invention to provide a sample holder for an IC device for use in a parallel lapping tool that is equipped with a hollow-centered sample holder assembly and at least three adjusting screws equally spaced circumferentially from each other and radially from the center of the holder such that a plane of polish can be adjusted to parallel a plane of interest in the IC device.
It is another further object of the present invention to provide a sample holder for an IC device for use in a parallel lapping tool that is equipped with a hollow-centered sample holder assembly threadingly engaging the sample holder body such that, after a plane of polish is adjusted to parallel a plane of interest, the thickness of the layer removed from the sample surface can be readily adjusted by advancing the sample holder assembly.
It is still another object of the present invention to provide a sample holder for an IC device for use in a parallel lapping tool that has a sample holder body of disc shape, a threaded center aperture and at least three threaded apertures situated equally spaced circumferentially from each other and radially from the center aperture.
It is yet another object of the present invention to provide a sample holder for an IC device for use in a parallel lapping process which is equipped with a hollow-centered sample holder assembly and a sample mounting knob equipped with a substantially clear window for mounting the IC device thereto.
It is still another further object of the present invention to provide a method for mounting an electronic device to a sample holder for use in a parallel lapping tool by providing a hollow-centered sample holder assembly mounted in a sample holder body for adjusting the thickness of the sample surface to be removed and at least three adjusting screws for adjusting a plane of polish to be parallel with a plane of interest in the electronic device and then mounting the electronic device to the hollow-centered sample holder assembly.
It is yet another further object of the present invention to provide a method for parallel lapping an integrated circuit device by first providing a hollow-centered sample holder assembly mounted in a sample holder body for adjusting the thickness of surface layer to be removed and at least three adjusting screws for adjusting a plane of polish to a plane of interest and then lapping an IC device mounted to the sample holder assembly in a parallel lapping tool while observing the progress of lapping through the hollow-centered holder assembly.